In many digital systems it is necessary to perform divisions where either the dividend or divisor is a fixed quantity. For example, some heart rate monitors measure a time T between two heart beats and determine a heart rate which is the multiplicative inverse 1/T or T.sup.-1 of the time. Another example digital system is an anti-lock braking system which uses a velocity (d/.DELTA.T) which may be determined from a fixed distance d traveled in a measured time .DELTA.T. Because the distance d is fixed, the multiplicative inverse .DELTA.T.sup.-1 of the time .DELTA.T is proportional to the velocity, and anti-lock braking systems may calculate and use the multiplicative inverse .DELTA.T.sup.-1 in place of the velocity.
Prior art digital systems typically determine multiplicative inverses by dividing, using a math block with a hardware divider. Hardware dividers are fast enough for most applications including anti-lock braking system but are expensive because hardware dividers require a large area in an integrated circuit. Other systems use software divide techniques instead of hardware. However, software divides can be too slow for some anti-lock braking system applications. To speed up a software divide, two or more processors working in parallel can be employed, but using more than one processor increases system cost. Accordingly, fast and inexpensive circuits are needed for dividing.